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64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Reset
If the RST#/HOLD# pin is used as a reset pin, RST# pin provides a hardware method for resetting the
device. Driving the RST# pin high puts the device in normal operating mode. The RST# pin must be
driven low for a minimum of T RST time to reset the device. The SO pin is in high impedance state while
the device is in reset. A successful reset will reset the status register to its power-up state (BPL, BUSY
and WEL = 0; BP3, BP2, BP1, and BP0 = 1). See Table 2 for default power-up modes. A device reset
during an active Program or Erase operation aborts the operation and data of the targeted address
range may be corrupted or lost due to the aborted erase or program operation.
CE#
T RECR
T RECP
T REC E
SCK
T RST
RST#
T RHZ
SO
SI
1292 F28.0
Figure 4: Reset Timing Diagram
Table 2: Reset Timing Parameters
Symbol
Parameter
Min
Max
Units
T RST
T RHZ
T RECR
T RECP
T RECE
Reset Pulse Width
Reset to High-Z Output
Reset Recovery from Read
Reset Recovery from Program
Reset Recovery from Erase
100
105
100
10
1
ns
ns
ns
μs
ms
T2.25036
?2011 Silicon Storage Technology, Inc.
6
DS25036A
06/11
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